DS7837 Datasheet, PDF (1/4 Pages) National Semiconductor (TI) – Hex Unified Bus Receiver

February 1996
DS7837 DS8837 Hex Unified Bus Receiver
General Description
The DS7837 DS8837 are high speed receivers designed for
use in bus organized data transmission systems intercon-
nected by terminated 120X impedance lines The external
termination is intended to be 180X resistor from the bus to
the a5V logic supply together with a 390X resistor from the
bus to ground The receiver design employs a built-in input
hysteresis providing substantial noise immunity Low input
current allows up to 27 driver receiver pairs to utilize a com-
mon bus Disable inputs provide time discrimination Disable
inputs and receiver outputs are TTL compatible Perform-
ance is optimized for systems with bus rise and fall times
s_{1 0 ms V}
Features
Y _{Low receiver input current for normal VCC or VCC} e _0V
(15 mA typ)
Y _{Six separate receivers per package}
Y _{Built-in receiver input hysteresis (1V typ)}
Y _{High receiver noise immunity (2V typ)}
Y _{Temperature insensitive receiver input thresholds track}
bus logic levels
Y _{TTL compatible disable and output}
Y _{Molded or cavity dual-in-line or flat package}
Y _{High speed}
Typical Application
Connection Diagram
Dual-In-Line Package
TL F 5811 – 1
Top View
Order Number DS7837J DS8837M or DS8837N
See NS Package Number J16A M16A or N16A
TL F 5811 – 2
C1996 National Semiconductor Corporation TL F 5811
RRD-B30M36 Printed in U S A
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