DS7640 Datasheet, PDF (1/4 Pages) National Semiconductor (TI) – Quad NOR Unified Bus Receiver

February 1996
DS7640 DS8640 Quad NOR Unified Bus Receiver
General Description
The DS7640 and DS8640 are quad 2-input receivers de-
signed for use in bus organized data transmission systems
interconnected by terminated 120X impedance lines The
external termination is intended to be 180X resistor from
the bus to the a5V logic supply together with a 390X resis-
tor from the bus to ground The design employs a built-in
input threshold providing substantial noise immunity Low
input current allows up to 27 driver receiver pairs to utilize a
common bus
Features
Y _{Low input current with normal VCC or VCC} e _0V
(30 mA typ)
Y _{High noise immunity (1 1V typ)}
Y _{Temperature-insensitive input thresholds track bus logic}
levels
Y _{TTL compatible output}
Y _{Matched optimized noise immunity for ‘‘1’’ and ‘‘0’’}
levels
Y _{High speed (19 ns typ)}
Connection Diagram
Dual-In-Line Package
Typical Application
Top View
Order Number DS7640J or DS8640N
See NS Package Number J14A or N14A
120X Unified Data Bus
TL F 5805 – 1
C1996 National Semiconductor Corporation TL F 5805
RRD-B30M36 Printed in U S A
TL F 5805 – 2
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