DS75124 Datasheet, PDF (1/4 Pages) National Semiconductor (TI) – Triple Line Receiver

February 1996
DS75124 Triple Line Receiver
General Description
The DS75124 is designed to meet the input output interface
specifications for IBM System 360 It has built-in hysteresis
on one input on each of the three receivers to provide large
noise margin The other inputs on each receiver are in a
standard TTL configuration The DS75124 is compatible
with standard TTL logic and supply voltage levels
Features
Y _{Built-in input threshold hysteresis}
Y _{High speed typical propagation delay time 20 ns}
Y _{Independent channel strobes}
Y _{Input gating increases application flexibility}
Y _{Single 5 0V supply operation}
Y _{Plug-in replacement for the SN75124 and the 8T24}
Connection Diagram and Truth Table
Dual-In-Line Package
Inputs
Output
AB RS
Y
H H XX
L
X X LH
L
L X HX
H
L X XL
H
X L HX
H
X L XL
H
H e high level L e low level X e irrelevant
B input and last two lines of the truth table
are applicable to receivers 1 and 2 only
Top View
TL F 5792 – 1
Order Number DS75124N
See NS Package Number N16A
Typical Application
C1996 National Semiconductor Corporation TL F 5792
TL F 5792 – 2
RRD-B30M36 Printed in U S A
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