DS40MB200 Datasheet, PDF (1/14 Pages) National Semiconductor (TI) – Dual 4 Gb/s 1:2 Mux/Buffer with Onput Wqualization and Output Pre-Emphasis

August 2005
DS40MB200
Dual 4 Gb/s 1:2 Mux/Buffer with Input Equalization and
Output Pre-Emphasis
General Description
The DS40MB200 is a dual signal conditioning 2:1 multi-
plexer and 1:2 fan-out buffer designed for use in backplane
redundancy applications. Signal conditioning features in-
clude input equalization and programmable output pre-
emphasis that enable data communication in FR4 back-
planes up to 4 Gb/s. Each input stage has a fixed equalizer
to reduce ISI distortion from board traces. All output drivers
have 4 selectable steps of pre-emphasis to compensate for
transmission losses from long FR4 backplanes and reduce
deterministic jitter. The pre-emphasis levels can be indepen-
dently controlled for the line-side and switch-side drivers.
The internal loopback paths from switch-side input to switch-
side output enable at-speed system testing. All receiver
inputs and driver outputs are internally terminated with 100Ω
differential terminating resistors
Features
n Dual 2:1 multiplexer and 1:2 buffer
n 1– 4 Gbps fully differential data paths
n Fixed input equalization
n Programmable output pre-emphasis
n Independent switch and line side pre-emphasis controls
n Programmable switch-side loopback mode
n On-chip terminations
n +3.3V supply
n Low power, 1W max
n Lead-less LLP-48 package (7mmx7mmx0.8mm, 0.5mm
pitch)
n 0˚C to +85˚C operating temperature range
Functional Block Diagram
© 2005 National Semiconductor Corporation DS200217
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