DS3884A Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – BTL Handshake Transceiver

August 2000
DS3884A
BTL Handshake Transceiver
General Description
The DS3884A is one in a series of transceivers designed
specifically for the implementation of high performance Fu-
turebus+ and proprietary bus interfaces. The DS3884A is a
BTL 6-bit Handshake Transceiver designed to conform to
IEEE 1194.1 (Backplane Transceiver Logic — BTL) as speci-
fied in the IEEE 896.2 Futurebus+ specification.
Features
n Fast propagation delay (3 ns typ)
n 6-bit BTL transceiver
n Selective receiver glitch filtering (FR1–FR3)
n Meets 1194.1 Standard on Backplane Transceiver Logic
(BTL)
n Supports live insertion
n Glitch free power-up/down protection
n Typically less than 5 pF bus-port capacitance
n Low Bus-port voltage swing (typically 1V) at 80 mA
n TTL compatible driver and control inputs
n Separate TTL I/O
n Open collector bus-port outputs allow Wired-OR
connection
n Controlled rise and fall time to reduce noise coupling to
adjacent lines
n Built in Bandgap reference with separate QV _CC and
QGND pins for precise receiver thresholds
n Exceeds 2 kV ESD testing (Human Body Model)
n Individual Bus-port ground pins
n Product offered in PQFP package styles
Connection Diagram
Order Number DS3884AVF
See NS Package VF44B
DS011460-1
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