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DS25BR120_0711 Datasheet, PDF (1/14 Pages) National Semiconductor (TI) – 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis
November 6, 2007
DS25BR120
3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis
General Description
The DS25BR120 is a single channel 3.125 Gbps LVDS buffer
optimized for high-speed signal transmission over lossy FR-4
printed circuit board backplanes and balanced metallic ca-
bles. Fully differential signal paths ensure exceptional signal
integrity and noise immunity.
The DS25BR120 features four levels of pre-emphasis (PE)
for use as an optimized driver device. Other LVDS devices
with similar IO characteristics include the following products.
The DS25BR110 features four levels of equalization for use
as an optimized receiver device, while the DS25BR100 fea-
tures both pre-emphasis and equalization for use as an opti-
mized repeater device. The DS25BR150 is a buffer/repeater
with the lowest power consumption and does not feature
transmit pre-emphasis nor receive equalization.
Wide input common mode range allows the receiver to accept
signals with LVDS, CML and LVPECL levels; the output levels
are LVDS. A very small package footprint requires minimal
space on the board while the flow-through pinout allows easy
board layout. The differential inputs and outputs are internally
terminated with a 100Ω resistor to lower device input and out-
put return losses, reduce component count and further mini-
mize board space.
Features
■ DC - 3.125 Gbps low jitter, high noise immunity, low power
operation
■ Four levels of transmit pre-emphasis drive lossy
backplanes and cables
■ On-chip 100Ω input and output termination minimizes
insertion and return losses, reduces component count and
minimizes board space
■ 7 kV ESD on LVDS I/O pins protects adjoining
components
■ Small 3 mm x 3 mm 8-LLP space saving package
Applications
■ Clock and data buffering
■ Metallic cable driving
■ FR-4 driving
Typical Application
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