DP8464B Datasheet, PDF (1/26 Pages) National Semiconductor (TI) – Disk Pulse Detector

June 1989
DP8464B Disk Pulse Detector
General Description
The DP8464B Disk Pulse Detector utilizes analog and digital
circuitry to detect amplitude peaks of the signal received
from the read write amplifier fitted with the heads of disk
drives The DP8464B produces a TTL compatible output
which on the positive leading edge indicates a signal peak
Electrically these peaks correspond to flux reversals on the
magnetic medium The signal from the read write amplifier
when reading a disk is therefore a series of pulses with
alternating polarity The Disk Pulse Detector accurately rep-
licates the time position of these peaks
The DP8464B Disk Pulse Detector has three main sections
the Amplifier the time channel and the gate channel The
Amplifier section consists of a wide bandwidth amplifier a
full wave rectifier and Automatic Gain Control (AGC) The
time channel is made from the differentiator and its follow-
ing bi-directional one shot while the gate channel is made
from the differential comparator with hysteresis the D flip-
flop and its following bi-directional one shot
The Disk Pulse Detector is fabricated using an advanced
oxide isolated Schottky process and has been designed to
function with data rates up to 15 Megabits second The
DP8464B is available in either a 300 mil wide 24-pin dual-in-
line package or a surface mount 28-pin plastic chip carrier
package Normally it will be fitted in the disk drive and its
output may be directly connected to the DP8461 or the
DP8465 Data Separator
Features
Y _{Wide input signal amplitude range from 20 mVpp to}
660 mVpp differential
Y _{Data rates up to 15 Megabits sec 2 7 code}
Y _{On-chip differential gain controlled amplifier differentia-}
tor comparator gating circuitry and output pulse
generator
Y _{Input capacitively coupled directly from the disk head}
read write amplifier
Y _{Adjustable comparator hysteresis}
Y _{AGC and differentiator time constants set by external}
components
Y _{TTL compatible digital Inputs and Outputs}
Y _{Encoded Data Output may connect directly to the}
DP8461 or DP8465 Data Separator
Y _{Standard drive supply 12V}g_10%
Y _{Available in 300 mil wide 24-pin dual-in-line package a}
surface mount 28-pin plastic chip carrier package or a
40-pin TapePak package
Block Diagram
Pin 5 No connection
Pin 8 No connection
Note All pin numbers in this data sheet refer to the 24-pin dual-in-line package
TapePak is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 5283
TL F 5283 – 7
RRD-B30M105 Printed in U S A