DP8402A Datasheet, PDF (1/18 Pages) National Semiconductor (TI) – DP8402A/DP8403/DP8404/DP8405 32-Bit Parallel Error Detection and Correction Circuits (EDACs)

PRELIMINARY
August 1989
DP8402A DP8403 DP8404 DP8405 32-Bit Parallel
Error Detection and Correction Circuits (EDAC’s)
General Description
The DP8402A DP8403 DP8404 and DP8405 devices are
32-bit parallel error detection and correction circuits
(EDACs) in 52-pin DP8402A and DP8403 or 48-pin DP8404
and DP8405 600-mil packages The EDACs use a modified
Hamming code to generate a 7-bit check word from a 32-bit
data word This check word is stored along with the data
word during the memory write cycle During the memory
read cycle the 39-bit words from memory are processed by
the EDACs to determine if errors have occurred in memory
Single-bit errors in the 32-bit data word are flagged and cor-
rected
Single-bit errors in the 7-bit check word are flagged and the
CPU sends the EDAC through the correction cycle even
though the 32-bit data word is not in error The correction
cycle will simply pass along the original 32-bit data word in
this case and produce error syndrome bits to pinpoint the
error-generating location
Double bit errors are flagged but not corrected These er-
rors may occur in any two bits of the 39-bit word from mem-
ory (two errors in the 32-bit data word two errors in the 7-bit
check word or one error in each word) The gross-error
condition of all lows or all highs from memory will be detect-
ed Otherwise errors in three or more bits of the 39-bit word
are beyond the capabilities of these devices to detect
Read-modify-write (byte-control) operations can be per-
formed with the DP8402A and DP8403 EDACs by using out-
put latch enable LEDBO and the individual OEB0 thru
OEB3 byte control pins
Diagnostics are performed on the EDACs by controls and
internal paths that allow the user to read the contents of the
DB and CB input latches These will determine if the failure
occurred in memory or in the EDAC
Features
Y _{Detects and corrects single-bit errors}
Y _{Detects and flags double-bit errors}
Y _{Built-in diagnostic capability}
Y _{Fast write and read cycle processing times}
Y _{Byte-write capability DP8402A and DP8403}
Y _{Fully pin and function compatible with TI’s}
SN74ALS632A thru SN74ALS635 series
System Environment
TL F 8535 – 1
TRI-STATE is a registered trademark of National Semiconductor Corp
C1995 National Semiconductor Corporation TL F 8535
RRD-B30M105 Printed in U S A