DP83846A Datasheet, PDF (1/59 Pages) National Semiconductor (TI) – DsPHYTER ㅡSingle 10/100 Ethernet Transceiver

Preliminary
April 2000
DP83846A DsPHYTER^® — Single 10/100 Ethernet Transceiver
General Description
Features
The DP83846A is a full feature single Physical Layer
device with integrated PMD sublayers to support both
10BASE-T and 100BASE-TX Ethernet protocols over Cat-
egory 3 (10 Mb/s) or Category 5 unshielded twisted pair
cables.
The DP83846A is designed for easy implementation of
10/100 Mb/s Ethernet home or office solutions. It interfaces
to Twisted Pair media via an external transformer. This
device interfaces directly to MAC devices through the IEEE
802.3u standard Media Independent Interface (MII) ensur-
ing interoperability between products from different ven-
dors.
The DP83846A utilizes on chip Digital Signal Processing
(DSP) technology and digital Phase Lock Loops (PLLs) for
robust performance under all operating conditions,
enhanced noise immunity, and lower external component
count when compared to analog solutions.
s IEEE 802.3 ENDEC, 10BASE-T transceivers and filters
s IEEE 802.3u PCS, 100BASE-TX transceivers and filters
s IEEE 802.3 compliant Auto-Negotiation
s Output edge rate control eliminates external filtering for
Transmit outputs
s BaseLine Wander compensation
s 5V/3.3V MAC interface
s IEEE 802.3u MII (16 pins/port)
s LED support (Link, Rx, Tx, Duplex, Speed, Collision)
s Single register access for complete PHY status
s 10/100 Mb/s packet loopback BIST (Built in Self Test)
s Low-power 3.3V, 0.35um CMOS technology
s 5V tolerant I/Os
s 80-pin LQFP package (12w) x (12l) x (1.4h) mm
System Diagram
Ethernet MAC
MII
DP83846A
10/100 Mb/s
DsPHYTER
25 MHz
Clock
Status
LEDs
RJ-45
10BASE-T
or
100BASE-TX
Typical DsPHYTER application
PHYTER^® and TRI-STATE^® are registered trademarks of National Semiconductor Corporation.
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