DP83231 Datasheet, PDF (1/16 Pages) National Semiconductor (TI) – CRD Device (FDDI Clock Recovery Device)

February 1991
DP83231 CRD^TM Device
(FDDI Clock Recovery Device)
General Description
The DP83231 CRD device is a clock recovery device that
has been designed for use in 100 Mbps FDDI (Fiber Distrib-
uted Data Interface) networks The device receives serial
data from a Fiber Optic Receiver in differential ECL NRZI
4B 5B group code format and outputs resynchronized NRZI
received data and a 125 MHz received clock in differential
ECL format for use by the DP83251 55 PLAYER^TM device
Features
Y _{Clock recovery at 100 Mbps data rate}
Y _{Internal 250 MHz VCO}
0 1% VCO operating range
Crystal controlled
Y _{Precision window centering delay line}
Y _Single a_{5V supply}
Y _{28-pin PLCC package}
Y _{BiCMOS processing}
FIGURE 1-1 FDDI Chip Set Block Diagram
TL F 10384 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
BSITM BMACTM PLAYERTM CDDTM and CRDTM are trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 10384
RRD-B30M105 Printed in U S A