DP8303A Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – 8-Bit TRI-STATE-R Bidirectional Transceiver (Inverting)

February 1996
DP8303A 8-Bit TRI-STATE
Bidirectional Transceiver (Inverting)
General Description
This family of high speed Schottky 8-bit TRI-STATE bidirec-
tional transceivers are designed to provide bidirectional
drive for bus oriented microprocessor and digital communi-
cations systems They are all capable of sinking 16 mA on
the A ports and 48 mA on the B ports (bus ports) PNP
inputs for low input current and an increased output high
(V_OH) level allow compatibility with MOS CMOS and other
technologies that have a higher threshold and less drive
capabilities In addition they all feature glitch-free power
up down on the B port preventing erroneous glitches on the
system bus in power up or down
DP8303A and DP7304B DP8304B are featured with Trans-
mit Receive (T R) and Chip Disable (CD) inputs to simplify
control logic For greater design flexibility DP8307A and
DP7308 DP8308 are featured with Transmit (T) and
Receive (R) control inputs
Features
Y _{8-bit directional data flow reduces system package}
count
Y _{Bidirectional TRI-STATE inputs outputs interface with}
bus oriented systems
Y _{PNP inputs reduce input loading}
Y _{Output high voltage interfaces with TTL MOS and}
CMOS
Y _{48 mA 300 pF bus drive capability}
Y _{Pinouts simplify system interconnections}
Y _{Transmit Receive and chip disable simplify control logic}
Y _{Compact 20-pin dual-in-line package}
Y _{Bus port glitch free power up down}
Logic and Connection Diagrams
Dual-In-Line Package
Logic Table
TL F 5856 – 1
Top View
Order Number DP8303AN
See NS Package Number N20A
TL F 5856 – 2
Inputs
Resulting Conditions
Chip Disable
Transmit Receive
A Port
B Port
0
0
OUT
IN
0
1
IN
OUT
1
X
TRI-STATE
TRI-STATE
TRI-STATE is a registered trademark of National Semiconductor Corp
X e Don’t care
C1996 National Semiconductor Corporation TL F 5856
RRD-B30M36 Printed in U S A
http www national com