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DM74LS395 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – 4-Bit Shift Register with TRI-STATE Outputs
February 1992
DM74LS395
4-Bit Shift Register with TRI-STATE Outputs
General Description
The LS395 is a 4-bit shift register with TRI-STATE outputs
and can operate in either a synchronous parallel load or a
serial shift-right mode as determined by the Select input An
asynchronous active LOW Master Reset (MR) input over-
rides the synchronous operations and clears the register
An active LOW Output Enable (OE) input controls the TRI-
STATE output buffers but does not interfere with the other
operations The fourth stage also has a conventional output
for linking purposes in multi-stage serial operations
Features
Y Shift right or parallel 4-bit register
Y TRI-STATE outputs
Y Input clamp diodes limit high speed termination effects
Y Fully CMOS and TTL compatible
Connection Diagram
Dual-In-Line Package
Logic Symbol
TL F 9833 – 1
Order Number DM74LS395WM or DM74LS395N
See NS Package Number M16B or N16E
VCC e Pin 16
GND e Pin 8
Mode Select Table
Operating Mode
Inputs tn
Outputs tna1
MR CP S DS Pn O0 O1 O2 O3
Asynchronous Reset
Shift SET First Stage
L X XX X L L L L
H K L H X H O0n O1n 02n
Shift RESET First Stage H K L L X L O0n O1n 02n
Parallel Load
H K H X Pn P0 P1 P2 P3
tn tna1 e Time before and after CP HIGH-to-LOW transition
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
TL F 9833 – 2
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9833
RRD-B30M115 Printed in U S A