DM7401 Datasheet, PDF (1/4 Pages) National Semiconductor (TI) – Quad 2-Input NAND Gates with Open-Collector Outputs

June 1989
DM5401 DM7401 Quad 2-Input NAND Gates
with Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic NAND function The open-collector out-
puts require external pull-up resistors for proper logical op-
eration
Pull-Up Resistor Equations
R_MAX
e
V_CC (Min) b V_OH
N₁ (I_OH) a N₂ (I_IH)
R_MIN
e
V_CC (Max) b V_OL
I_OL b N₃ (I_IL)
Where N₁ (I_OH) e total maximum output high current for all
outputs tied to pull-up resistor
N₂ (I_IH) e total maximum input high current for all
inputs tied to pull-up resistor
N₃ (I_IL) e total maximum input low current for all
inputs tied to pull-up resistor
Connection Diagram
Dual-In-Line Package
Order Number DM5401J DM5401W or DM7401N
See NS Package Number J14A N14A or W14B
Function Table
Y e AB
Inputs
Output
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
H e High Logic Level
L e Low Logic Level
C1995 National Semiconductor Corporation TL F 6614
TL F 6614 – 1
RRD-B30M105 Printed in U S A