DM54S251 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – TRI-STATE 1 of 8 Line Data Selector/Multiplexer

June 1989
DM54S251 DM74S251 TRI-STATE 1 of 8 Line
Data Selector Multiplexer
General Description
These data selectors multiplexers contain full on-chip bina-
ry decoding to select one-of-eight data sources and feature
a strobe-controlled TRI-STATE output The strobe must be
at a low logic level to enable these devices The TRI-STATE
outputs permit direct connection to a common bus When
the strobe input is high both outputs are in a high-imped-
ance state in which both the upper and lower transistors of
each totem pole output are off and the output neither drives
nor loads the bus significantly When the strobe is low the
outputs are activated and operate as standard TTL totem-
pole outputs
To minimize the possibility that two outputs will attempt to
take a common bus to opposite logic levels the output con-
trol circuitry is designed so that the average output disable
time is shorter than the average output enable time
Features
Y _{TRI-STATE version of S151}
Y _{Interface directly with system bus}
Y _{Perform parallel-to-serial conversion}
Y _{Permit multiplexing from N-lines to one line}
Y _{Complementary outputs provide true and inverted data}
Y _{Max no of common outputs}
54S 39
74S 129
Y _{Typical propagation delay time (D to Y) 8 ns}
Y _{Typical power dissipation 275 mW}
Connection Diagram
Function Table
TL F 6480 – 1
Order Number DM54S251J or DM74S251N
See NS Package Number J16A or N16E
Inputs
Outputs
Select
Strobe
Y
W
C BA
S
X XX
H
L LL
L
L LH
L
L HL
L
L HH
L
H LL
L
H LH
L
H HL
L
H HH
L
Z
Z
D0 D0
D1 D1
D2 D2
D3 D3
D4 D4
D5 D5
D6 D6
D7 D7
H e High Logic Level L e Low Logic Level
X e Don’t Care Z e High Impedance (Off)
D0 D1 D7 e The Level of the respective D input
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 6480
RRD-B30M105 Printed in U S A