DM54180 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – 9-Bit Parity Generators/Checkers

June 1989
DM54180 DM74180 9-Bit Parity Generators Checkers
General Description
These universal 9-bit (8 data bits plus 1 parity bit) parity
generators checkers feature odd even outputs and control
inputs to facilitate operation in either odd or even parity ap-
plications Depending on whether even or odd parity is be-
ing generated or checked the even or odd input can be
utilized as the parity or 9th-bit input The word-length capa-
bility is easily expanded by cascading
Input buffers are provided so that each data input repre-
sents only one normalized series 54 74 load A full fan-out
to 10 normalized series 54 74 loads is available from each
of the outputs at a low logic level A fan-out to 20 normal-
ized loads is provided at a high logic level to facilitate the
connection of unused inputs to used inputs
Connection Diagram
Dual-In-Line Package
Function Table
TL F 6559 – 1
Order Number DM54180J DM54180W or DM74180N
See NS Package Number J14A N14A or W14B
Inputs
Outputs
R of H’s at
A thru H
Even
Odd
R
Even
R
Odd
Even
H
L
H
L
Odd
H
L
L
H
Even
L
H
L
H
Odd
L
H
H
L
X
H
H
L
L
X
L
L
H
H
H e High Level L e Low Level X e Don’t Care
C1995 National Semiconductor Corporation TL F 6559
RRD-B30M105 Printed in U S A