CLC532 Datasheet, PDF (1/12 Pages) National Semiconductor (TI) – High-Speed 2:1 Analog Multiplexer

N
June 1999
CLC532
High-Speed 2:1 Analog Multiplexer
General Description
The CLC532 is a high-speed 2:1 multiplexer with active input and
output stages. The CLC532 also employs a closed-loop design which
dramatically improves accuracy. This monolithic device is constructed
using an advanced high-performance bipolar process.
The CLC532 has been specifically designed to provide settling times
of 17ns to 0.01%. This, coupled with the adjustable noise-bandwidth,
makes the CLC532 an ideal choice for infrared and CCD imaging
systems. Channel-to-channel isolation is better than 80dB @
10MHz. Low distortion (80dBc) and spurious signal levels make the
CLC532 a very suitable choice for both I/Q processors and receivers.
The CLC532 is offered over both the industrial and military temperature
ranges. The Industrial versions, CLC532AJP\AJE\AID, are specified
from -40°C to +85°C and are packaged in 14-pin plastic DIP's, 14-pin
SOIC's and 14-pin Side-Brazed packages. The extended temperature
versions, CLC532A8B/A8D/A8L-2, are specified from -55°C to +125°C
and are packaged in a 14-pin hermetic DIP and 20-terminal LCC
packages. (Contact factory for LCC and CERDIP availability.)
Ordering Information ...
CLC532AJP
-40^oC to +85^oC
14-pin plastic DIP
CLC532AJE
-40^oC to +85^oC
14-pin plastic SOIC
CLC532ALC
-40^oC to +85^oC
dice
CLC532AMC
-55^oC to +125^oC dice, MIL-STD-833
CLC532A8B
-55^oC to +125^oC 14-pin CERDIP;
MIL-STD-883
CLC532A8L-2A -55^oC to +125^oC 20-terminal LCC;
MIL-STD-883
Contact factory for other packages and DESC SMD number.
Features
s 12-bit settling (0.01%) - 17ns
s Low noise - 32µVrms
s High isolation - 80dB @ 10MHz
s Low distortion - 80dBc @ 5MHz
s Adjustable bandwidth - 190MHz (max)
Applications
s Infrared system multiplexing
s CCD sensor signals
s Radar I/Q switching
s High definition video HDTV
s Test and calibration
Typical Application
CHANNEL A
R_IN
CHANNEL B
R_IN
2
1
IN_A
C_COMP1
12
11
CLC532
4
3
IN_B
7
6
10
D_REF
V_OUT
R_L
C_COMP2
CHANNEL
SELECT
SELECT OUTPUT
1 Channel A
0 Channel B
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
20-Terminal LCC
Pinout
DIP & SOIC
87654
D_REF 9
INDEX CORNER
3 IN_A
GND 1
IN_A 2
SELECT 10
2 GND
GND 3
NC 11
V_EE ¹²
V_EE ¹³
TOP VIEW
1 NC
20 _+Vcc
19 _+Vcc
IN_B 4
DGND 5
14 15 16 17 18
D_REF 6
SELECT 7
14 +V_CC
13 +V_CC
12 COMP₁
11 OUTPUT
10 COMP₂
9 V_EE
8 V_EE
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