CLC502 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Clamping, Low-Gain Op Amp with Fast 14-bit Settling

N
June 1999
CLC502
Clamping, Low-Gain Op Amp with Fast 14-bit Settling
General Description
Features
s Output clamping with fast recovery
s 0.0025% settling in 25ns (32ns max.)
s Low power, 170mW
s Low distortion. -50dBc at 20MHz
Applications
s Output clamping applications
s High-accuracy A/D systems (12-14 bits)
s High-accuracy D/A converters
s Pulse amplitude modulation systems
The CLC502 is available in several versions to meet a variety of
requirements. A three-letter suffix determines the version:
CLC502AJP -40°C to +85°C
CLC502AJE -40°C to +85°C
8-pin plastic DIP
8-pin plastic SOIC
DESC SMD number: 5962-91743
Package Dimensions
Pinout
DIP & SOIC
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
http://www.national.com