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CLC501 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – High-Speed Output Clamping Op Amp
N
CLC501
High-Speed Output Clamping Op Amp
June 1999
General Description
Features
s Output clamping (Vhigh and Vlow)
s 1ns recovery from clamping/overdrive
s 0.05% settling in 12ns
s Characterized and guaranteed
at Av = +32
s Low power, 180mW
Applications
s Residue amplifier in high-accuracy,
subranging A/D systems
s High-speed communications
s Output clamping applications
s Pulse amplitude modulation systems
The CLC501 is available in several versions to meet a variety of
requirements. A three-letter suffix determines the version:
CLC501AJP -40°C to +85°C 8-pin plastic DIP
CLC501AJE -40°C to +85°C 8-pin plastic SOIC
DESC SMD number: 5962-89974
Non-Inverting Frequency Response
Vout = 2Vpp
Av = 16
Rf = 2.49kΩ
Av = 8
Rf = 4.02kΩ
0
-90
Av = 32
-180
Rf = 1.5kΩ
-270
Av = 64
Rf = 604Ω
-360
-450
1
10
100
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
Pinout
DIP & SOIC
http://www.national.com