CLC018 Datasheet, PDF (1/18 Pages) National Semiconductor (TI) – 8 x 8 Digital Crosspoint Switch, 1.4 Gbps

October 1998
CLC018
8 x 8 Digital Crosspoint Switch, 1.4 Gbps
General Description
National’s Comlinear CLC018 is a fully differential 8x8 digital
crosspoint switch capable of operating at data rates exceed-
ing 1.4 Gbps per channel. Its non-blocking architecture uti-
lizes eight independent 8:1 multiplexers to allow each output
to be independently connected to any input and any input to
be connected to any or all outputs. Additionally, each output
can be individually disabled and set to a high-impedance
state. This TRI-STATE^® feature allows flexible expansion to
larger switch array sizes.
Low channel-to-channel crosstalk allows the CLC018 to pro-
vide superior all-hostile jitter of 50 ps_PP. This excellent signal
fidelity along with low power consumption of 850 mW make
the CLC018 ideal for digital video switching plus a variety of
data communication and telecommunication applications.
The fully differential signal path provides excellent noise im-
munity, and the I/Os support ECL and PECL logic levels. In
addition, the inputs may be driven single-ended or differen-
tially and accept a wide range of common mode levels in-
cluding the positive supply. Single +5V or −5V supplies or
dual +5V supplies are supported. Dual supply mode allows
the control signals to be referenced to the positive supply
(+5V) while the high-speed I/O remains ECL compatible.
The double row latch architecture utilized in the CLC018 al-
lows switch reprogramming to occur in the background dur-
ing operation. Activation of the new configuration occurs with
a single “configure” pulse. Data integrity and jitter perfor-
mance on unchanged outputs are maintained during recon-
figuration. Two reset modes are provided. Broadcast reset
results in all outputs being connected to input port DI0.
TRI-STATE Reset results in all outputs being disabled.
The CLC018 is fabricated on a high-performance BiCMOS
process and is available in a 64-lead plastic quad flat pack
(PQFP).
Features
n Fully differential signal path
n Non-Blocking
n Flexible expansion to larger array sizes with very low
power
n Single +5/−5V or dual ±5V operation
n TRI-STATE outputs
n Double row latch architecture
n 64-lead PQFP package
Applications
n Serial digital video routing (SMPTE 259M)
n Telecom/datacom switching
n ATM SONET
Key Specifications
n High speed: >1.4 Gbps
n Low jitter:
<50 ps_PP for rates <500 Mbps
<100 ps_PP for rates <1.4 Gbps
n Low power; 850 mW with all outputs active
n Fast output edge speeds: 250 ps
CLC018 Block Diagram
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