CGS74B2525 Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – 1-to-8 Minimum Skew Clock Driver

September 1995
CGS74B2525
1-to-8 Minimum Skew Clock Driver
General Description
This minimum skew clock driver is designed for Clock Gen-
eration and Support (CGS) applications operating well
above 20 MHz (33 MHz 50 MHz) The device guarantees
minimum output skew across the outputs of a given device
and also from device-to-device Skew parameters are also
provided as a means to measure duty cycle requirements as
those found in high speed clocking systems The ’B2525 is
a minimum skew clock driver with one input driving eight
outputs specifically designed for signal generation and clock
distribution applications
Features
Y _{Clock Generation and Support (CGS) Device Ideal for}
high frequency signal generation or clock distribution
applications
Y _{CGS74B version features National’s Advanced Bipolar}
FAST LSI process
Y _{1-to-8 low skew clock distribution}
Y _{600 ps pin-to-pin output skew}
Y _{Specifications for device-to-device variation of propaga-}
tion delay
Y _{Specification for transition skew to meet duty cycle}
requirements
Y _{Center pin VCC and GND configuration to minimize high}
speed switching noise
Y _{Current sourcing 48 mA and current sinking of 64 mA}
Y _{Low dynamic power consumption above 20 MHz}
Y _{Guaranteed 4 kV ESD protection}
Logic Symbol
Connection Diagram
Pin Assignment
for DIP and SOIC
TL F 10907 – 1
TL F 10907 – 2
FAST and TRI-STATE are registered trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 10907
RRD-B30M115 Printed in U S A