CGS701AV Datasheet, PDF (1/10 Pages) National Semiconductor (TI) – Commercial, Industrial Low Skew PLL 1 to 8 CMOS Clock Driver

December 1995
CGS701AV
Commercial Low Skew PLL 1 to 8 CMOS Clock Driver
CGS701ATV
Industrial Low Skew PLL 1 to 8 CMOS Clock Driver
General Description
CGS701A is an off the shelf clock driver specifically de-
signed for today’s high speed designs It provides low skew
outputs which are produced at different frequencies from
three fixed input references The XTALIN input pin is de-
signed to be driven from a 25 MHz–40 MHz crystal oscilla-
tor
The PLL using a charge pump and an internal loop filter
multiplies this input frequency to create a maximum output
frequency of four times the input
The device includes a TRI-STATE control pin to disable
the outputs This feature allows for low frequency functional
testing and debugging
Also included is an EXTSEL pin to allow testing the chip via
an external source The EXTSEL pin once set to high caus-
es the External-Clock MUX to change its input from the
output of the VCO and Counter to the external clock signal
provided via SKWTST input pin
(continued)
Features
Y _Guaranteed
400 ps pin-to-pin skew (t_OSHL and t_OSLH) on 1X
outputs
Y _{Pentium and PowerPC}TM _compatible
Y g_{300 ps propagation delay}
Y _{Output buffer of eight drivers for large fanout}
Y _{25 MHz – 160 MHz output frequency range}
Y _{Outputs operating at 4X 2X 1X of the reference fre-}
quency for multifrequency bus applications
Y _{Selectable output frequency}
Y _{Internal loop filter to reduce noise and jitter}
Y _{Separate analog and digital VCC and ground pins}
Y _{Low frequency test mode by disabling the PLL}
Y _{Implemented on National’s Core CMOS process}
Y _{Symmetric output current drive} a₃₀ b_{30 mA IOL IOH}
Y _{Industrial temperature of} b_{40 C to} a_{85 C}
Y _{28-pin PLCC for optimum skew performance}
Y _{Guaranteed 2k volts ESD protection}
Connection Diagram
Pin Assignment for PLCC
TL F 11920 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
Pentium is a registered trademark of Intel Corporation
PowerPCTM is a trademark of International Business Machines Corporation
Pin Description
PLCC Package
Pin
Name
Description
1
V_CC
2
FBK IN
Digital V_CC
Feedback Input Pin
3
CLK4
4X Clock Output
4
V_CC
5
XTALIN
Digital V_CC
Crystal Oscillator Input
6
GND
Digital Ground
7
FBK OUT
Feedback Output Pin
8
V_CC
9
CLK1 l
Digital V_CC
1X Clock Output
10
GND
Digital Ground
11
CLK1 2
1X Clock Output
12
TRI-STATE
Output TRI-STATE Control
13
SKWTST
Skew Testing Pin
14
CLK1 3
1X Clock Output
15
GND
Digital Ground
16
CLK1 4
1X Clock Output
17
V_CC
18
SKWSEL
Digital V_CC
Skew Test Selector Pin
19
GNDA
Analog Ground
20
V_CCA
21
EXTSEL
Analog V_CC
External Clock MUX Selector
22
GND
Digital Ground
23
CLK1 5
1X Clock Output
24
V_CC
25
CLK1 0
Digital V_CC
1X Clock Output
26
CLK1SEL
CLK1 Multiplier Selector
27
GND
Digital Ground
28
CLK2
2X Clock Output
C1996 National Semiconductor Corporation TL F 11920
RRD-B30M106 Printed in U S A
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