CGS700V Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Commercial Low Skew PLL 1 to 9 CMOS Clock Driver

September 1995
CGS700V
Commercial Low Skew PLL 1 to 9 CMOS Clock Driver
General Description
CGS700 is an off the shelf clock driver specifically designed
for today’s high speed processors It provides low skew out-
puts which are produced at different frequencies from three
fixed input references The XTALIN input pin is designed to
be driven from three distinct crystal oscillators running at
25 MHz 33 MHz or 40 MHz
The PLL using a charge pump and an internal loop filter
multiplies this input frequency to create a maximum output
frequency of four times the input
The device includes a TRI-STATE control pin to disable
the outputs while the PLL is still in lock This function allows
for testing the board without having to wait to acquire the
lock once the testing is complete
(continued)
Features
Y _{Guaranteed and tested}
500 ps pin-to-pin skew (t_OSHL and t_OSLH) on 1X
outputs
Y _Guaranteed
400 ps pin-to-pin skew (t_OSHL and t_OSLH) on
1Xoutputs
Y _PentiumTM _{and PowerPC}TM _compatible
Y _{Output buffer of nine drivers for large fanout}
Y _{25 MHz – 160 MHz output frequency range}
Y _{Outputs operating at 4X 2X 1X of the reference}
frequency for multi-frequency bus applications
Y _{Selectable output frequency}
Y _{TRI-STATE output control with the PLL is in the lock}
state
Y _{Internal loop filter to reduce noise and jitter}
Y _{Separate analog and digital VCC and Ground pins}
Y _{Low frequency test mode by disabling the PLL}
Y _{Implemented on National’s Core CMOS process}
Y _{Symmetric output current drive}
a30 mA b30 mA I_OL I_OH
Y _{28-pin PCC for optimum skew performance}
Y _{Guaranteed 2k ESD protection}
Connection Diagram
Pin Assignment for PLCC
TL F 11955 – 1
See NS Package Number V28A
TRI-STATE is a registered trademark of National Semiconductor Corporation
PowerPCTM is a trademark of IBM
PentiumTM is a trademark of Intel Corporation
C1996 National Semiconductor Corporation TL F 11955
Pin Description
PLCC Package
Pin
Name
Description
1
V_CC
2
SKWSEL
Digital V_CC
Skew Test Selector Pin
3
CLK4
4X Clock Output
4
V_CC
5
XTALIN
Digital V_CC
Crystal Oscillator Input
6
GND
Digital Ground
7
CLK1 0
1X Clock Output
8
V_CC
9
CLK1 1
Digital V_CC
1X Clock Output
10
GND
Digital Ground
11
CLK1 2
1X Clock Output
12
TRI-STATE
Output TRI-STATE Control
13
SKWTST
Skew Testing Pin
14
CLK1 3
1X Clock Output
15
GND
Digital Ground
16
CLK1 4
1X Clock Output
17
V_CC
18
EXTCLK
Digital V_CC
External Test Clock
19
GNDA
Analog Ground
20
V_CCA
21
EXTSEL
Analog V_CC
External Clock Mux Selector
22
GND
Digital Ground
23
CLK1 5
1X Clock Output
24
V_CC
25
CLK1 6
Digital V_CC
1X Clock Output
26
CLK1SEL
CLK1 Multiplier Selector
27
GND
Digital Ground
28
CLK2
2X Clock Output
RRD-B30M66 Printed in U S A