CD4512BC Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – 8-Channel Buffered Data Selector

February 1988
CD4512BM CD4512BC 8-Channel Buffered Data Selector
General Description
The CD4512BM CD4512BC buffered 8-channel data selec-
tor is a complementary MOS (CMOS) circuit constructed
with N- and P-channel enhancement mode transistors This
data selector is primarily used as a digital signal multiplexer
selecting 1 of 8 inputs and routing the signal to a TRI-
STATE output A high level at the Inhibit input forces a low
level at the output A high level at the Output Enable (OE)
input forces the output into the TRI-STATE condition Low
levels at both the Inhibit and (OE) inputs allow normal oper-
ation
Features
Y _{Wide supply voltage range}
3 0V to 15V
Y _{High noise immunity}
Y _{TRI-STATE output}
0 45 V_DD (typ )
Y _{Low quiescent power dissipation 0 25 mW package}
(typ ) V_CC e 5 0V
Y _{Plug-in replacement for Motorola MC14512}
Connection Diagram and Truth Table
Dual-In-Line Package
Order Number CD4512B
Top View
Address Inputs
C
B
A
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
j
j
j
j
j
j
j e Don’t care
Hi-Z e TRI-STATE condition
Xn e Data at input n
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 5993
TL F 5993 – 1
Control Inputs
Inhibit
OE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
j
1
Output
Z
X0
X1
X2
X3
X4
X5
X6
X7
0
Hi-Z
RRD-B30M105 Printed in U S A