CD4070BM Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Quad 2-Input EXCLUSIVE-OR, NOR Gate

March 1992
CD4070BM CD4070BC
Quad 2-Input EXCLUSIVE-OR Gate
CD4077BM CD4077BC
Quad 2-Input EXCLUSIVE-NOR Gate
General Description
Employing complementary MOS (CMOS) transistors to
achieve wide power supply operating range low power con-
sumption and high noise margin the CD4070BM BC and
CD4077BM BC provide basic functions used in the imple-
mentation of digital integrated circuit systems The N- and
P-channel enhancement mode transistors provide a sym-
metrical circuit with output swing essentially equal to the
supply voltage No DC power other than that caused by
leakage current is consumed during static condition All in-
puts are protected from damage due to static discharge by
diode clamps to V_DD and V_SS
Features
Y _{Wide supply voltage range}
3 0V to 15V
Y _{High noise immunity}
Y _{Low power TTL}
compatibility
0 45 V_DD typ
Fan out of 2 driving 74L
or 1 driving 74LS
Y _{CD4070B Pin compatible to CD4030A}
Equivalent to MM54C86 MM74C86
and MC14070B
Y _{CD4077B Equivalent to MC14077B}
Connection Diagram
CD4070BM CD4070BC
Dual-In-Line Package
CD4077BM CD4077BC
Dual-In-Line Package
Top View
TL F 5976 – 1
Top View
TL F 5976 – 5
Typical Performance
Characteristics
Truth Tables
Propagation Delay Time
vs Load Capacitance
CD4070BM CD4070BC
Inputs
A
B
L
L
L
H
H
L
H
H
Outputs
Y
L
H
H
L
CD4077BM CD4077BC
Inputs
A
B
L
L
L
H
H
L
H
H
Outputs
Y
H
L
L
H
C1995 National Semiconductor Corporation TL F 5976
TL F 5976 – 2
RRD-B30M105 Printed in U S A