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CD4047BM Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Low Power Monostable/Astable Multivibrator
October 1993
CD4047BM CD4047BC Low Power
Monostable Astable Multivibrator
General Description
CD4047B is capable of operating in either the monostable
or astable mode It requires an external capacitor (between
pins 1 and 3) and an external resistor (between pins 2 and
3) to determine the output pulse width in the monostable
mode and the output frequency in the astable mode
Astable operation is enabled by a high level on the astable
input or low level on the astable input The output frequency
(at 50% duty cycle) at Q and Q outputs is determined by the
timing components A frequency twice that of Q is available
at the Oscillator Output a 50% duty cycle is not guaranteed
Monostable operation is obtained when the device is trig-
gered by low-to-high transition at a trigger input or high-to-
low transition at b trigger input The device can be retrig-
gered by applying a simultaneous low-to-high transition to
both the a trigger and retrigger inputs
A high level on Reset input resets the outputs Q to low Q to
high
Features
Y Wide supply voltage range
Y High noise immunity
Y Low power TTL
compatibility
3 0V to 15V
0 45 VDD (typ )
Fan out of 2 driving 74L
or 1 driving 74LS
SPECIAL FEATURES
Y Low power consumption special CMOS oscillator con-
figuration
Y Monostable (one-shot) or astable (free-running) opera-
tion
Y True and complemented buffered outputs
Y Only one external R and C required
MONOSTABLE MULTIVIBRATOR FEATURES
Y Positive- or negative-edge trigger
Y Output pulse width independent of trigger pulse dura-
tion
Y Retriggerable option for pulse width expansion
Y Long pulse widths possible using small RC components
by means of external counter provision
Y Fast recovery time essentially independent of pulse
width
Y Pulse-width accuracy maintained at duty cycles ap-
proaching 100%
ASTABLE MULTIVIBRATOR FEATURES
Y Free-running or gatable operating modes
Y 50% duty cycle
Y Oscillator output available
Y Good astable frequency stability
typical
e g2% a 0 03% C 100 kHz
frequency e g0 5% a 0 015% C 10 kHz
deviation (circuits trimmed to frequency
VDD e 10V g10%)
Applications
Y Frequency discriminators
Y Timing circuits
Y Time-delay applications
Y Envelope detection
Y Frequency multiplication
Y Frequency division
Block and Connection Diagrams
Dual-In-Line Package
C1995 National Semiconductor Corporation TL F 5969
TL F 5969 – 1
Top View
TL F 5969 – 2
Order Number CD4047B
RRD-B30M105 Printed in U S A