CD4013BM Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Dual D Flip-Flop

February 1988
CD4013BM CD4013BC Dual D Flip-Flop
General Description
The CD4013B dual D flip-flop is a monolithic complementa-
ry MOS (CMOS) integrated circuit constructed with N- and
P-channel enhancement mode transistors Each flip-flop
has independent data set reset and clock inputs and ‘‘Q’’
and ‘‘Q’’ outputs These devices can be used for shift regis-
ter applications and by connecting ‘‘Q’’ output to the data
input for counter and toggle applications The logic level
present at the ‘‘D’’ input is transferred to the Q output during
the positive-going transition of the clock pulse Setting or
resetting is independent of the clock and is accomplished
by a high level on the set or reset line respectively
Features
Y _{Wide supply voltage range}
Y _{High noise immunity}
Y _{Low power TTL}
compatibility
3 0V to 15V
0 45 V_DD (typ )
fan out of 2 driving 74L
or 1 driving 74LS
Applications
Y _Automotive
Y _{Data terminals}
Y _{Instrumentation}
Y _{Medical electronics}
Y _{Alarm system}
Y _{Industrial electronics}
Y _{Remote metering}
Y _Computers
Connection Diagram
Dual-In-Line Package
Order Number CD4013B
Truth Table
Top View
TL F 5946 – 1
CL
D
R
S
Q
Q
L
0
0
0
0
1
L
1
0
0
1
0
K
x
0
0
Q
Q
x
x
1
0
0
1
x
x
0
1
1
0
x
x
1
1
1
1
No change
e Level change
x e Don’t care case
C1995 National Semiconductor Corporation TL F 5946
RRD-B30M105 Printed in U S A