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CD4007M Datasheet, PDF (1/4 Pages) National Semiconductor (TI) – Dual Complementary Pair Plus Inverter
CD4007M CD4007C Dual
Complementary Pair Plus Inverter
General Description
The CD4007M CD4007C consists of three complementary
pairs of N- and P-channel enhancement mode MOS transis-
tors suitable for series shunt applications All inputs are pro-
tected from static discharge by diode clamps to VDD and
VSS
For proper operation the voltages at all pins must be con-
strained to be between VSS b 0 3V and VDD a 0 3V at all
times
Features
Y Wide supply voltage range
Y High noise immunity
Connection Diagram
Dual-In-Line Package
February 1988
3 0V to 15V
0 45 VCC (typ )
Top View
Note All P-channel substrates are connected to VDD
and all N-channel substrates are connected to VSS
Order Number CD4007
TL F 5943 – 1
C1995 National Semiconductor Corporation TL F 5943
RRD-B30M105 Printed in U S A