ADC12L063 Datasheet, PDF (1/22 Pages) National Semiconductor (TI) – 12-Bit, 62 MSPS, 354 mW A/D Converter with Internal Sample-and-Hold

November 2002
ADC12L063
12-Bit, 62 MSPS, 354 mW A/D Converter with Internal
Sample-and-Hold
General Description
The ADC12L063 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 62 Megasamples per second (MSPS), mini-
mum. This converter uses a differential, pipelined architec-
ture with digital error correction and an on-chip sample-and-
hold circuit to minimize die size and power consumption
while providing excellent dynamic performance. Operating
on a single 3.3V power supply, this device consumes just
354 mW at 62 MSPS, including the reference current. The
Power Down feature reduces power consumption to just 50
mW.
The differential inputs provide a full scale input swing equal
to ±V_REF with the possibility of a single-ended input. Full use
of the differential input is recommended for optimum perfor-
mance. For ease of use, the buffered, high impedance,
single-ended reference input is converted on-chip to a differ-
ential reference for use by the processing circuitry. Output
data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C.
Features
n Single supply operation
n Low power consumption
n Power down mode
n On-chip reference buffer
Key Specifications
n Resolution
n Conversion Rate
n Bandwidth
n DNL
n INL
n SNR
n SFDR
n Data Latency
n Supply Voltage
n Power Consumption, 62 MHz
12 Bits
62 MSPS(min)
170MHz
±0.5 LSB(typ)
±1.0 LSB(typ)
66 dB(typ)
78 dB(typ)
6 Clock Cycles
+3.3V ± 300 mV
354 mW(typ)
Applications
n Ultrasound and Imaging
n Instrumentation
n Cellular Base Stations/Communications Receivers
n Sonar/Radar
n xDSL
n Wireless Local Loops
n Data Acquisition Systems
n DSP Front Ends
Connection Diagram
© 2002 National Semiconductor Corporation DS200263
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