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ADC11L066 Datasheet, PDF (1/27 Pages) National Semiconductor (TI) – 11-Bit, 66 MSPS, 450 MHz Bandwidth A/D Converter with Internal Sample-and-Hold
December 2003
ADC11L066
11-Bit, 66 MSPS, 450 MHz Bandwidth A/D Converter with
Internal Sample-and-Hold
General Description
The ADC11L066 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 11-bit
digital words at 66 Megasamples per second (MSPS), mini-
mum, with typical operation possible up to 80 MSPS. This
converter uses a differential, pipeline architecture with digital
error correction and an on-chip sample-and-hold circuit to
minimize die size and power consumption while providing
excellent dynamic performance. A unique sample-and-hold
stage yields a full-power bandwidth of 450 MHz. Operating
on a single 3.3V power supply, this device consumes just
357 mW at 66 MSPS, including the reference current. The
Power Down feature reduces power consumption to just
50 mW.
The differential inputs provide a full scale input swing equal
to ±VREF with the possibility of a single-ended input. Full use
of the differential input is recommended for optimum perfor-
mance. For ease of use, the buffered, high impedance,
single-ended reference input is converted on-chip to a differ-
ential reference for use by the processing circuitry. Output
data format is 11-bit offset binary.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C.
Features
n Single supply operation
n Low power consumption
n Power down mode
n On-chip reference buffer
Key Specifications
n Resolution
n Conversion Rate
n Full Power Bandwidth
n DNL
n INL
n SNR (fIN = 10 MHz)
n SFDR (fIN = 10 MHz)
n Data Latency
n Supply Voltage
n Power Consumption, 66 MHz
11 Bits
66 MSPS
450 MHz
±0.2 LSB (typ)
±0.5 LSB (typ)
65 dB (typ)
78 dB (typ)
6 Clock Cycles
+3.3V ±300 mV
357 mW (typ)
Applications
n Ultrasound and Imaging
n Instrumentation
n Cellular Base Stations/Communications Receivers
n Sonar/Radar
n Wireless Local Loops
n Data Acquisition Systems
n DSP Front Ends
Connection Diagram
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