ADC083000 Datasheet, PDF (1/33 Pages) National Semiconductor (TI) – High Performance, Low Power, 8-Bit, 3 GSPS A/D Converter

ADVANCE INFORMATION
June 2006
ADC083000
High Performance, Low Power, 8-Bit, 3 GSPS A/D
Converter
General Description
Note: This product is currently in development. - ALL
specifications are design targets and are subject to
change.
The ADC083000 is a single, low power, high performance
CMOS analog-to-digital converter that digitizes signals to 8
bits resolution at sampling rates up to 3.4 GSPS. Consuming
a typical 1.8 Watts at 3 GSPS from a single 1.9 Volt supply,
this device is guaranteed to have no missing codes over the
full operating temperature range. The unique folding and
interpolating architecture, the fully differential comparator
design, the innovative design of the internal sample-and-
hold amplifier and the self-calibration scheme enable a very
flat response of all dynamic parameters up to Nyquist, pro-
ducing a high 7.0 ENOB with a 748 MHz input signal and a
3 GHz sample rate while providing a 10^-18 B.E.R. The
ADC083000 achieves a 3GSPS sampling rate by utilizing
both the rising and falling edge of a 1.5 GSPS input clock.
Output formatting is offset binary and the LVDS digital out-
puts are compliant with IEEE 1596.3-1996, with the excep-
tion of an adjustable common mode voltage between 0.8V
and 1.2V.
The ADC has a 1:4 demultiplexer that feeds four LVDS
buses and reduces the output data rate on each bus to a
quarter of the sampling rate. The ADC can be programmed
into the 1:2 Output Mode where the data is output on the Dc
and Dd channels at the rate of the input clock.
The converter typically consumes less than 20 mW in the
Power Down Mode and is available in a 128-lead, thermally
enhanced exposed pad LQFP and operates over the Indus-
trial (-40˚C ≤ T_A ≤ +85˚C) temperature range.
Features
n Internal Sample-and-Hold
n Single +1.9V ±0.1V Operation
n Choice of SDR or DDR output clocking
n 1:2 or 1:4 Selectable Output Demux
n Clock Phase Adjust for Multiple ADC Synchronization
n Guaranteed No Missing Codes
n Serial Interface for Extended Control
n Fine Adjustment of Input Full-Scale Range and Offset
n Duty Cycle Corrected Sample Clock
n Test pattern
Key Specifications
n Resolution
n Max Conversion Rate
n Bit Error Rate
n ENOB @ 748 MHz Input
n SNR @ 748MHz
n Full Power Bandwidth
n Power Consumption
— Operating
— Power Down Mode
8 Bits
3 GSPS (min)
10^-18 (typ)
7.0 Bits (typ)
44 dB (typ)
3 GHz (typ)
1.8 W (typ)
20 mW (typ)
Applications
n Direct RF Down Conversion
n Digital Oscilloscopes
n Satellite Set-top boxes
n Communications Systems
n Test Instrumentation
© 2006 National Semiconductor Corporation DS201932
www.national.com