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ADC08061 Datasheet, PDF (1/16 Pages) National Semiconductor (TI) – 500 ns A/D Converter with S/H Function and Input Multiplexer
June 1999
ADC08061/ADC08062
500 ns A/D Converter with S/H Function and Input
Multiplexer
General Description
Using a patented multi-step A/D conversion technique, the
8-bit ADC08061 and ADC08062 CMOS ADCs offer 500 ns
(typ) conversion time, internal sample-and-hold (S/H), and
dissipate only 125 mW of power. The ADC08062 has a
two-channel multiplexer. The ADC08061/2 family performs
an 8-bit conversion using a 2-bit voltage estimator that gen-
erates the 2 MSBs and two low-resolution (3-bit) flashes that
generate the 6 LSBs.
Input track-and-hold circuitry eliminates the need for an ex-
ternal sample-and-hold. The ADC08061/2 family performs
accurate conversions of full-scale input signals that have a
frequency range of DC to 300 kHz (full-power bandwidth)
without need of an external S/H.
The digital interface has been designed to ease connection
to microprocessors and allows the parts to be I/O or memory
mapped.
Key Specifications
n Resolution
n Conversion Time
n Full Power Bandwidth
n Throughput rate
n Power Dissipation
n Total Unadjusted Error
8 bits
560 ns max (WR-RD Mode)
300 kHz
1.5 MHz
100 mW max
±1⁄2 LSB and ±1 LSB
Features
n 1 or 2 input channels
n No external clock required
n Analog input voltage range from GND to V+
n Overflow output available for cascading (ADC08061)
n ADC08061 pin-compatible with the industry standard
ADC0820
Applications
n Mobile telecommunications
n Hard disk drives
n Instrumentation
n High-speed data acquisition systems
Block Diagram
* ADC08061
** ADC08062
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS011086
DS011086-1
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