74LVX3L384 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – 10-Bit Low Power Bus Switch

February 1996
74LVX3L384
10-Bit Low Power Bus Switch
General Description
The LVX3L384 provides 10 bits of high-speed CMOS TTL-
compatible bus switches The low on resistance of the
switch allows inputs to be connected to outputs without
adding propagation delay or generating additional ground
bounce noise The device is organized as two 5-bit switches
with separate bus enable (BE) signals When BE is low the
switch is on and port A is connected to port B When BE is
high the switch is open and a high-impedance state exists
between the two ports
Features
Y _{5X switch connection between two ports}
Y _{Zero propagation delay}
Y _{Ultra low power with 0 2 mA typical ICC}
Y _{Zero ground bounce in flow-through mode}
Y _{Control inputs compatible with TTL level}
Y _{Available in SOIC TSSOP and QSOP (SSOP 0 15}
Body width)
Logic Diagram
Connection Diagram
Pin Assignment for
SOIC QSOP and TSSOP
TL F 11653 – 1
Truth Table
BE A BE B
B₀ – B₄
B₅ – B₉
Function
L
L A₀ – A₄
A₅ – A₉
Connect
L
H A₀ – A₄
HIGH-Z State Connect
H
L HIGH-Z State A₅ – A₉
Connect
H
H HIGH-Z State HIGH-Z State Disconnect
Pin Names
BE A BE B
A₀ – A₉
B₀ – B₉
TL F 11653 – 2
Description
Bus Switch Enable
Bus A
Bus B
Order Number
See NS Package Number
SOIC JEDEC
74LVX3L384WM
74LVX3L384WMX
M24B
QSOP
74LVX3L384QSC
74LVX3L384QSCX
MQA24
TSSOP
74LVX3L384MTC
74LVX3L384MTCX
MTC24
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C1996 National Semiconductor Corporation TL F 11653
RRD-B30M17 Printed in U S A
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