74LS168 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – 54LS168 Synchronous Bi-Directional BCD Decade Counter

54LS168 Synchronous Bi-Directional
BCD Decade Counter
General Description
The 54LS168 is a fully synchronous 4-state up down coun-
ter featuring a preset capability for programmable operation
carry lookahead for easy cascading and a U D input to con-
trol the direction of counting It counts in the BCD (8421)
sequence and all state changes whether in counting or par-
allel loading are initiated by the LOW-to-HIGH transition of
the clock
Connection Diagram
Logic Symbol
Dual-In-Line Package
June 1989
TL F 10207 – 1
Order Number 54LS168DMQB
54LS168FMQB or 54LS168LMQB
See NS Package Number
E20A J16A or W16A
V_CC e Pin 16
GND e Pin 8
Pin Names
CEP
CET
CP
P0 – P3
PE
UD
Q0 – Q3
TC
Description
Count Enable Parallel Input (Active LOW)
Count Enable Trickle Input (Active LOW)
Clock Pulse Input (Active Rising Edge)
Parallel Data Inputs
Parallel Enable Input (Active LOW)
Up-Down Count Control Input
Flip-Flop Outputs
Terminal Count Output (Active LOW)
TL F 10207 – 2
C1995 National Semiconductor Corporation TL F 10207
RRD-B30M105 Printed in U S A