54LS379 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Quad Parallel Register with Enable

June 1989
54LS379 DM74LS379
Quad Parallel Register with Enable
General Description
The LS379 is a 4-bit register with buffered common Enable
This device is similar to the LS175 but features the common
Enable rather than common Master Reset
Features
Y _{Edge-triggered D-type inputs}
Y _{Buffered positive edge-triggered clock}
Y _{Buffered common enable input}
Y _{True and complement outputs}
Connection Diagram
Dual-In-Line Package
Logic Symbol
TL F 10186 – 1
Order Number 54LS379DMQB 54LS379FMQB
54LS379LMQB DM74LS379M or DM74LS379N
See NS Package Number E20A
J16A M16A N16E or W16A
V_CC e Pin 16
GND e Pin 8
Pin
Names
E
D0 – D3
CP
Q0 – Q3
Q0 – Q3
Description
Enable Input (Active LOW)
Data Inputs
Clock Pulse Input (Active Rising Edge)
Flip-Flop Outputs
Complement Outputs
TL F 10186 – 2
C1995 National Semiconductor Corporation TL F 10186
RRD-B30M105 Printed in U S A