54LS03 Datasheet, PDF (1/6 Pages) –

June 1989
54LS03 DM54LS03 DM74LS03
Quad 2-Input NAND Gates
with Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic NAND function The open-collector out-
puts require external pull-up resistors for proper logical op-
eration
Features
Y _{Alternate Military Aerospace device (54LS03) is avail-}
able Contact a National Semiconductor Sales Office
Distributor for specifications
Pull-Up Resistor Equations
R_MAX
V_CC (Min) b V_OH
N₁ (I_OH) a N₂ (I_IH)
R_MIN
V_CC (Max) b V_OL
I_OL b N₃ (I_IL)
Where N₁ (I_OH) total maximum output high current for all
outputs tied to pull-up resistor
N₂ (I_IH) total maximum input high current for all
inputs tied to pull-up resistor
N₃ (I_IL) total maximum input low current for all
inputs tied to pull-up resistor
Connection Diagram
Dual-In-Line Package
Function Table
Order Number 54LS03DMQB 54LS03FMQB 54LS03LMQB
DM54LS03J DM54LS03W DM74LS03M or DM74LS03N
See NS Package Number E20A J14A M14A N14A or W14B
TL F 6344 1
Y AB
Inputs
Output
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
H High Logic Level
L Low Logic Level
C1995 National Semiconductor Corporation TL F 6344
RRD B30M105 Printed in U S A