54FCT533 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Octal Transparent Latch with TRI-STATE Outputs

September 1998
54FCT533
Octal Transparent Latch with TRI-STATE^® Outputs
General Description
The FCT533 consists of eight latches with TRI-STATE out-
puts for bus organized system applications. The flip-flops ap-
pear transparent to the data when Latch Enable (LE) is
HIGH. When LE is low, the data satisfying the input timing re-
quirements is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH, the bus out-
put is in the high impedance state.
Features
n Eight latches in a single package
n TTL input and output level compatible
n CMOS power consumption
n TRI-STATE outputs drive bus lines or buffer memory
address registers
n Output sink capability of 32mA, source capability of 12
mA
n Inverted version of the FCT373
n Standard Microcircuit Drawing (SMD) 5962-8865101
Logic Symbols
IEEE/IEC
DS100969-1
Pin
Names
D₀– D₇
LE
OE
O₀– O₇
Description
Data Inputs
Latch Enable Input
Output Enable Input
TRI-STATE Latch
Outputs
DS100969-2
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
FACT™ is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100969
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