54F413DM Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – 64 x 4 First-In First-Out Buffer Memory with Parallel I/O

January 1995
54F 74F413
64 x 4 First-In First-Out Buffer Memory with Parallel I O
General Description
The ’F413 is an expandable fall-through type high-speed
First-In First-Out (FIFO) buffer memory organized as 64
words by four bits The 4-bit input and output registers rec-
ord and transmit respectively asynchronous data in parallel
form Control pins on the input and output allow for hand-
shaking and expansion The 4-bit wide 62-bit deep fall-
through stack has self-contained control logic
Features
Y _{Separate input and output clocks}
Y _{Parallel input and output}
Y _{Expandable without external logic}
Y _{15 MHz data rate}
Y _{Supply current 160 mA max}
Y _{Available in SOIC (300 mil only)}
Commercial
74F413PC
Military
54F413DM (Note 1)
Package
Number
N16E
J16A
Package Description
16-Lead (0 300 Wide) Molded Dual-In-Line
16-Lead Ceramic Dual-In-Line
Note 1 Military grade device with environmental and burn-in processing Use suffix e DMQB
Logic Symbol
Connection Diagram
Pin Assignment
for DIP
TL F 9541 – 1
TL F 9541 – 2
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9541
RRD-B30M105 Printed in U S A