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54F08DM Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – Quad 2-Input AND Gate
December 1994
54F/74F08
Quad 2-Input AND Gate
General Description
This device contains four independent gates, each of which
performs the logic AND function.
Features
n Guaranteed 4000V minimum ESD protection
Ordering Code: See Section 0
DSXXX
Commercial
74F08PC
74F08SC (Note 1)
74F08SJ (Note 1)
Military
54F08DM (Note 2)
54F08FM (Note 2)
54F08LM (Note 2)
Package
Number
N14A
J14A
M14A
M14D
W14B
E20A
Package Description
14-Lead (0.300" Wide) Molded Dual-In-Line
14-Lead Ceramic Dual-In-Line
14-Lead (0.150" Wide) Molded Small Outline, JEDEC
14-Lead (0.300" Wide) Molded Small Outline, EIAJ
14-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB.
Logic Symbol
IEEE/IEC
Connection Diagrams
Pin Assignment
for DIP, SOIC and Flatpak
DS009457-3
Pin Assignment
for LCC
DS009457-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1997 National Semiconductor Corporation DS009457
PrintDate=1997/08/26 PrintTime=15:23:43 9460 ds009457 Rev. No. 1 cmserv Proof
DS009457-1
www.national.com
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