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54F04DM Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – Hex Inverter
November 1994
54F/74F04
Hex Inverter
General Description
This device contains six independent gates, each of which
performs the logic INVERT function.
Features
n Guaranteed 4000V minimum ESD protection
Ordering Code: See Section 0
DSXXX
Commercial
74F04PC
74F04SC (Note 1)
74F04SJ (Note 1)
Military
54F04DM (Note 2)
54F04FM (Note 2)
54F04LM (Note 2)
Package
Number
N14A
J14A
M14A
M14D
W14B
E20A
Package Description
14-Lead (0.300" Wide) Molded Dual-In-Line
14-Lead Ceramic Dual-In-Line
14-Lead (0.150" Wide) Molded Small Outline, JEDEC
14-Lead (0.300" Wide) Molded Small Outline, EIAJ
14-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB.
Logic Symbol
IEEE/IEC
Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
DS009456-3
Pin Assignment
for LCC
DS009456-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1997 National Semiconductor Corporation DS009456
PrintDate=1997/08/26 PrintTime=15:21:53 9457 ds009456 Rev. No. 1 cmserv Proof
DS009456-1
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