54F00 Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – Quad 2-Input NAND Gate

December 1994
54F/74F00
Quad 2-Input NAND Gate
General Description
This device contains four independent gates, each of which
performs the logic NAND function.
Features
n Guaranteed 4000V minimum ESD protection
Ordering Code: See Section 0
DSXXX
Commercial
74F00PC
74F00SC (Note 1)
74F00SJ (Note 1)
Military
54F00DM (Note 2)
54F00FM (Note 2)
54F00LM (Note 2)
Package
Number
N14A
J14A
M14A
M14D
W14B
E20A
Package Description
14-Lead (0.300" Wide) Molded Dual-In-Line
14-Lead Ceramic Dual-In-Line
14-Lead (0.150" Wide) Molded Small Outline, JEDEC
14-Lead (0.300" Wide) Molded Small Outline, EIAJ
14-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB.
Logic Symbol
Connection Diagrams
IEEE/IEC
Pin Assignment
for DIP, SOIC and Flatpak
DS009454-3
Pin Assignment
for LCC
DS009454-2
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
© 1997 National Semiconductor Corporation DS009454
PrintDate=1997/08/27 PrintTime=13:03:35 9738 ds009454 Rev. No. 1 cmserv Proof
DS009454-1
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