54ACTQ533 Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – Quiet Series Octal Transparent Latch with TRI-STATE Outputs

August 1998
54ACTQ533
Quiet Series Octal Transparent Latch with TRI-STATE^®
Outputs
General Description
The ACTQ533 consists of eight latches with TRI-STATE out-
puts for bus organized system applications. The flip-flops ap-
pear transparent to the data when Latch Enable (LE) is
HIGH. When LE is low, the data satisfying the input timing re-
quirements is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH, the bus out-
put is in the high impedance state.
The ACTQ533 utilizes NSC Quiet Series technology to guar-
antee quiet output switching and improve dynamic threshold
performance. FACT Quiet Series™ features GTO™ output
control and undershoot corrector in addition to a split ground
bus for superior performance.
Features
n I_CC and I_OZ reduced by 50%
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Improved latch up immunity
n Eight latches in a single package
n TRI-STATE outputs drive bus lines or buffer memory
address registers
n Outputs source/sink 24 mA
n Inverted version of the ACTQ373
n 4 kV minimum ESD immunity
Logic Symbols
IEEE/IEC
DS100241-1
Pin
Names
D₀– D₇
LE
OE
O₀– O₇
Description
Data Inputs
Latch Enable Input
Output Enable Input
TRI-STATE Latch
Outputs
DS100241-2
GTO™ is a trademark of National Semiconductor Corporation.
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
FACT^® is a registered trademark of Fairchild Semiconductor Corporation.
FACT Quiet Series™ is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100241
www.national.com