54AC378 Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – Parallel D Register with Enable

March 1993
54AC 74AC378
Parallel D Register with Enable
General Description
The ’AC378 is a 6-bit register with a buffered common En-
able This device is similar to the ’AC174 but with common
Enable rather than common Master Reset
Features
Y _{6-bit high-speed parallel register}
Y _{Positive edge-triggered D-type inputs}
Y _{Fully buffered common clock and enable inputs}
Y _{Input clamp diodes limit high-speed termination effects}
Y _{Standard Military Drawing (SMD)}
’AC378 5962-91605
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 10231–1
IEEE IEC
TL F 10231 – 2
TL F 10231 – 3
TL F 10231–4
Pin Names
E
D₀ – D₅
CP
Q₀ – Q₅
Description
Enable Input (Active LOW)
Data Inputs
Clock Pulse Input (Active Rising Edge)
Outputs
FACTTM is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 10231
RRD-B30M75 Printed in U S A