CF5761 Datasheet, PDF (4/10 Pages) Nippon Precision Circuits Inc – CMOS Analog Clock IC with Alarm Function

CF5761 series
SPECIFICATIONS
Absolute Maximum Ratings
Parameter
Symbol
Supply voltage range
Input voltage range
Operating temperature range
Storage temperature range
V_DD − V_SS
V _IN
T_opr
T _stg
Electrical Characteristics
Condition
Rating
Unit
−0.3 to 5.0
V
V_SS to V_DD
V
−30 to 80
°C
−65 to 150
°C
1.5V operation
Ta = 25°C, V_SS = 0V, V_DD = 1.5V, X’tal (f₀ = 32.768kHz, C_I = 35kΩ max, C_G = 20pF) unless otherwise noted
Parameter
Symbol
Condition
Rating
Unit
min
typ
max
Operating voltage
Oscillator startup time¹
Frequency voltage characteristic
V _DD
t₁
V_DD = 1.2V
∆f/f
1.2
1.5
3.6
V
–
–
5.0
s
–
–
1.0
ppm/0.1V
Current consumption¹
O1, O2 motor output current²
AI HIGH-level input current
AI LOW-level input current
SN, SEL HIGH-level input current
SN LOW-level input current
AO1, AO2, AO3 LOW-level output
current ³
AO1, AO2, AO3 HIGH-level output
current ³
T1 LOW-level output current
T1 HIGH-level output current
F output voltage⁴
Built-in capacitance
No output load
–
I_DD
No output load, F output
–
0.5
1.0
µA
0.9
1.8
I_OUT
V_DD = 1.2V, R_L = 400Ω
2.40
2.55
–
mA
I _IH1
V_DD = 1.5V, V_IH = 1.5V
0.6
3
7.5
µA
I _IL1
V_DD = 1.5V, V_IL = 0V
0.6
3
7.5
µA
I_IH2
V_DD = 1.5V, V_IH = 1.5V
0.2
1
2
µA
I_IH3
V_DD = 1.5V, V_IH = 0.5V
9
18
36
I_IL2
V_DD = 1.5V, V_IL = 0V
0.2
1
2
µA
I_IL3
V_DD = 1.5V, V_IL = 1.0V
9
18
36
I_OL1
V_DD = 1.5V, V_OL = 0.75V
900
2000
–
µA
I_OL2
V_DD = 1.5V, V_OL = 0.75V
10
30
100
I_OH1
V_DD = 1.5V, V_OH = 0.75V
900
2000
–
µA
I_OH2
V_DD = 1.5V, V_OH = 0.75V
10
30
100
I _OLT
V_DD = 1.5V, V_OL = 1.5V
5
10
20
µA
I _OHT
V_DD = 1.5V, V_OH = 0V
5
10
20
µA
V_F
V_DD = 1.2V, output
capacitance C_L = 50pF
0.4
–
–
V
C_D
See series lineup
pF
1. Measured using standard circuits.
2. R_L is the resistance of the motor coil connected between O1 and O2.
3. The rating varies depending on the device selected. Please refer to the series lineup table for details.
4. F output voltage is the difference voltage, with load capacitor C_L connected between F and VSS pins, between 0.5V_DD and the peak voltage.
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