SM5846AP Datasheet, PDF (34/36 Pages) Nippon Precision Circuits Inc – Multi-function Digital Filter

SM5846AP
Microprocessor Interface
Microprocessor interface pins
When MDS is LOW, the SM5846AP is controlled by
internal flags set by serial data transferred over the
microprocessor interface comprising MDLE, MDCK
and MDT.
Pin name
MDLE
MDCK
Function
Microprocessor data latch enable input
Microprocessor data transfer clock input
Pin name
MDT
Function
Serial data input
Internal control flag serial data on MDT is input into
an internal shift register on the rising edge of
MDCK. After 8-bit data has been input, the data in
the shift register is stored in one of four internal flag
registers on the rising edge of MDLE latch enable.
The address of the flag register is derived by decod-
ing bits 1 to 3 of the 8-bit data.
Microprocessor interface
MDT
MDCK
MDLE
Decoder
8bit SIPO Shift Register
D
C
Q
8bit Register
D
8bit Register
D
8bit Register
D
8bit Register
D
C
Q
C
Q
C
Q
C
Q
D-ATT Attenation
Mode flag1
Mode flag2
Mode flag3
Microprocessor interface data input timing
MDCK and MDLE can also follow the dotted lines above
MDLE
MDCK
MDT
bit1 bit2 bit3 bit4 bit5 bit6 bit7 bit8
MSB
LSB
NIPPON PRECISION CIRCUITS—34