SM8223A Datasheet, PDF (12/15 Pages) Nippon Precision Circuits Inc – FSK Decoder and DTMF Receiver IC

SM8223A
FSK Demodulator
When an FSK signal is received, the FSK/DTMF
signal discriminator circuit sets the FSK/DTMF pin
HIGH and connects the input signal to the FSK
demodulator circuit. Demodulated data is output on
DOUT with the format shown in figure 4. The FSK
signal conforms to the following Bellcore standard.
Table 1. FSK signal
Parameter
Modulation type
Logic “1” data (mark)
Logic “0” data (space)
Signal level (mark)
Signal level (space)
Data transfer rate
Description
Continuous-phase binary frequency-shift-
keying
1200 ± 12 Hz
2200 ± 22 Hz
−32 to −1 2 d B m
−36 to −1 2 d B m
1200 ± 12 baud
Start bit LSB
MSB Stop bit
FSK signal b6 b7 1 0 b0 b1 b2 b3 b4 b5 b6 b7 1 0 b0 b1
DOUT b4 b5 b6 b7 1 0 b0 b1 b2 b3 b4 b5 b6 b7 1 0 b0 b1
Figure 4. FSK signal to DOUT output
DTMF Demodulator
When a DTMF signal is received, the FSK/DTMF
signal discriminator circuit sets the FSK/DTMF pin
LOW and connects the input signal to the DTMF
demodulator circuit. The DTMF signal is comprised
by a high-group frequency and a low-group fre-
quency which, in combination, represent a point in
the DTMF matrix.
Table 2. DTMF matrix
Low group
697Hz
770Hz
852Hz
941Hz
1209Hz
1
4
7
*
High group
1336Hz 1477Hz
2
3
5
6
8
9
0
#
1633Hz
A
B
C
D
The DTMF receiver demodulates the received
DTMF signal and outputs data bits Q₀ to Q₃ and a 4-
bit (2-mod-16) checksum S₀ to S₃ in serial format on
DOUT.
Table 3. DTMF signal output (DOUT)
DTMF
Checksum
Matrix
input
D₀
D₁
D₂
D₃
D₄
D₅
D₆
D₇
Q₀ Q₁ Q₂ Q₃ S₀ S₁ S₂ S₃
1
10001111
2
01000111
3
11001011
4
00100011
5
10101101
6
01100101
7
11101001
8
00010001
9
10011110
0
01010110
*
11011010
#
00110010
A
10111100
B
01110100
C
11111000
D
00000000
NIPPON PRECISION CIRCUITS—12