MTP25N05E Datasheet, PDF (1/2 Pages) New Jersey Semi-Conductor Products, Inc. – TMOS IV Power Field Effect Transistor

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20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081
U.SA
., Una.
TELEPHONE: [phone]
[phone]
FAX: [phone]
TMOS IV
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N-Channel Enhancement-Mode Silicon Gate
This advanced "E" series of TMOS power MOSFETs is designed to withstand high
energy in the avalanche and commutation modes. These new energy efficient devices
also offer drain-to-source diodes with fast recovery times. Designed for low voltage,
high speed switching applications in power supplies, converters and PWM motor con-
trols, these devices are particularly well suited for bridge circuits where diode speed and
commutating safe operating area are critical, and offer additional safety margin against
unexpected voltage transients.
• ipto'n"1 ^'''m-to-n'pin riiortf) ripfiqrifiri to pBp|acB
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External Zener Transient Suppressor — Absorbs High
iV^k ^SB
Energy in the Avalanche Mode — Undamped
Inductive Switching (UIS) Energy Capability Specified
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at 100'C.
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• Commutating Safe Operating Area (CSOA) Specified for
11,9 in Halt pprt Full Rririfji, Circuits
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• Source to-Drgin Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
MTP25N05E
TMOS POWER FETs
25 AMPERES
rDS(on) = 0,07 OHM
50 VOLTS
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MAXIMUM RATINGS (Tj = 25'C unless otherwise noted)
Rating
Drain-Source Voltage
Drain-Gate Voltage (RQS - 1 Mil)
Gate-Source Voltage — Continuous
— Non-repetitive dp § 50 us)
Drain Current —> Continuous
— Pulsed
Total Power Dissipation fi TC - 25°C
Derate above 2S'C
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case
— Junction to Ambient
Maximum Lead Temperature for Soldering
Purposes, 1/8* from case for 5 seconds
Symbol
VDSS
VDGR
VGS
VGSM
ID
IDM
PD
Tj, T8(g
R«JC
TL
TO-220AB
Value
SO
60
±20
±40
25
80
100
0.8
-6510 150
Unit
Vdc
Vdc
Vdc
Vpk
Artc
Watts
•c
1.25
°OW
62.5
275
•C
LHsIgntr's Data for "Wo»t C«M" Conditions — Tno Designer's Data Sheet permits the design of most circuits entirely from tho ioformvllon pr«**it«d
SQA Limit Curves — representing boundaries on devfca charBCtenstics — era given to facilitate "worst C4»" design.
NJ Semi-Conductors reserves the right to change test conditions, parameter limits and package dimensions without
notice. Inrormat.on furnished b> NJ Semi-Conductors is believed to be both accurate and reliable at the time of going
to press. However, NJ Semi-Conductors assumes no responsibility for any errors or omissionsdiscovered in its use
N.I Semi-Conductors encourages customers to verify that datasheets are current before placing orders
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