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MTP20N10E Datasheet, PDF (1/2 Pages) New Jersey Semi-Conductor Products, Inc. – TMOS IV Power Field Effect Transistor
<£e.mi-Concluctoi ZPioducti, (Inc.
20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081
U.S.A.
TELEPHONE: (201) 376-2922
(212) 227-6005
FAX: (201) 376-8960
Designer's Data Sheet
TMOS IV
Power Field Effect Transistor
N-Channel Enhancement-Mode Silicon Gate
This advanced "E" series of TMOS power MOSFETs is
designed to withstand high energy in the avalanche and com-
mutation modes. These new energy efficient devices also offer
drain-to-source diodes with fast recovery times. Designed for
low voltage, high speed switching applications in power sup-
plies, converters and PWM motor controls, these devices are
particularly well suited for bridge circuits where diode speed
and commutating safe operating area are critical, and offer
additional safety margin against unexpected voltage transients.
• Internal Source-to-Drain Diode Designed to Replace External
Zener Transient Suppressor — Absorbs High Energy in the
Avalanche Mode— Undamped Inductive Switching (UIS)
Energy Capability Specified at 100°C.
• Commutating Safe Operating Area (CSOA) Specified for Use
in Half and Full Bridge Circuits
• Source-to-Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
MTP20N10E
TMOS POWER FET
20 AMPERES
ros(on) = 0.15 OHM
100 VOLTS
TO-220AB
MAXIMUM RATINGS
Rating
Drain-Source Voltage
Drain-Gate Voltage (RGS ~ 1M!"
Gate-Source Voltage — Continuous
— Non-repetitive Up < 50 jis)
Drain Current — Continuous
— Pulsed
Total Power Dissipation (n TC = 25°C
Derate above 25"C
Operating and Storage Temperature Range
Symbol
VDSS
VDGR
VGS
VGSM
ID
IOM
PD
Tj, Tstg
Value
100
100
±20
±40
20
60
100
0.67
-6510 175
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Warts
W/°C
°C
UNCLAMPED DRAIN-TO-SOURCEAVALANCHE CHARACTERISTICS (Tj <s 175"C)
Single Pulse Drain-to-Source Avalanche Energy
Repetitive Pulse Drain-to-Source Avalanche Energy
WDSSIII
400
mJ
WDSS (21
100
WDSR (3)
10
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case
— Junction to Ambient
RftJC
1.6
°C/W
L_ "»JA
62.5
Maximum Lead Temperature for Soldering Purposes, 1/8" from case for 5 seconds
TL
275
•c
(IIVDD = 25V, ID = 20 A, L = 1.5 mH, Initial TC = 25°C
(2) VDD - 25 V, ID = 20 A. L = 380 ,M, Initial TC = 100"C
(3)f - 10kHz
Designer's Data for "Worst Case" Conditions — The Designer's Data Sheet permits the design of most circuits entirely from the information pn
SOA Limit curves — representing boundaries on device characteristics — are given to facilitate "worst case" design,
TMOS and Designer's ire trademarks of Motorola Inc.
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