MTP15N05E Datasheet, PDF (1/2 Pages) Motorola, Inc – POWER FIELD EFFECT TRANSISTOR N-CHANNEL ENHANCEMENT-MODE SILICON GATE

20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081
U.S.A.
, Dnc.
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Designer's Data Sheet
Power Field Effect Transistor
N-Channel Enhancement-Mode
Silicon Gate
This TMOS Power FET is designed for low voltage, high
speed power switching applications such as switching regulators,
converters, solenoid and relay drivers.
• Silicon Gate for Fast Switching Speeds ~~ Switching Times
Specified at 100°C
• Designer's Data — IpsS- vDS(on)< vGS(th) and SOA Specified
at Elevated Temperature
• Rugged — SOA is Power Dissipation Limited
• Source-to-Drain Diode Characterized for Use With Inductive Loads
TMOS
MTP15N05E
TMOS POWER FET
15 AMPERES
RDS(on) - 0.1 OHM
50 VOLTS
MAXIMUM RATINGS
Rrtfatg
Drain-Source Voltage
Drain-Gate Voltage <RQS = 1Mn'
Gate-Source Voltage — Continuous
— Non-repetitive (tp * 50 MS)
Drain Current — Continuous
— Pulsed
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
Thermal Resistance
Junction to Case
Junction to Ambient
TO-220
Maximum Lead Temperature for Soldering
Purposes, 1/8" from case for 5 seconds
Symbol
VDSS
VDGR
VQS
VGSM
ID
IDM
PD
Tj, Tatg
Value
50
SO
±20
±40
15
40
75
0.6
-65 to 150
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Watts
W/°C
X
R»JC
RSJA
TL
°C/W
1.67
62.5
260
"t
TO-22QAB
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