NJG1143UA2 Datasheet, PDF (1/15 Pages) New Japan Radio – GPS LOW NOISE AMPLIFIER GaAs MMIC

NJG1143UA2
GPS LOW NOISE AMPLIFIER GaAs MMIC
! GENERAL DESCRIPTION
The NJG1143UA2 is a GPS LNA GaAs MMIC featured very samll size, low
noise figure, high gain and low current consumpition. The NJG1143UA2
operates from 1.5V to 3.6V single voltage, has stand-by mode to save the
supply current, and requires only three external components. The
NJG1143UA2 has a on-chip ESD protection. The NJG1143UA2 is available in
a very small, lead-free, halogen-free, 1.0mm x 1.0mm x 0.37 mm, 6-pin
EPFFP6-A2 package.
! PACKAGE OUTLINE
NJG1143UA2
! FEATURES
" Low supply voltage
" Low control voltage
" Low current consumption
" High gain
" Low noise figure
" Input power at 1dB gain compression point
" High input IP3
" Stand-by function
" Small package size
" Integrated ESD protection circuit
" Lead-free and halogen-free
+2.85V typ. (+1.5V~+3.6V)
+1.8V typ. (+1.5V~+3.6V)
4.0mA typ. @V_DD=2.85V, V_CTL=1.8V
7μA typ.
@V_DD=2.85V, V_CTL=0V, Stand-by mode
20.0dB typ. @V_DD=2.85V, V_CTL=1.8V, f=1575MHz
0.70dB typ. @V_DD=2.85V, V_CTL=1.8V, f=1575MHz
-16.5dBm typ. @V_DD=2.85V, V_CTL=1.8V, f=1575MHz
-2.0dBm typ. @V_DD=2.85V, V_CTL=1.8V, f=1575+1575.1MHz
EPFFP-A2 (Package size: 1.0mmx1.0mmx0.37mm typ.)
! PIN CONFIGURATION
(Top View)
GND ₅
6
4
RFIN
VDD
Bias
Circuit
Pin Connection
1. GND
2. VCTL
3. RFOUT
4. VDD
5. GND
6. RFIN
Logic
GND
Circuit
1
2
VCTL
RFOUT
3
! TRUTH TABLE
“H”=V_CTL(H), “L”=V_CTL(L)
VCTL
H
L
LNA Mode
Active mode
Stand-by mode
Note: Specifications and description listed in this datasheet are subject to change without notice.
Ver.2010-07-17
-1-