MC-4R64CEE6B Datasheet, PDF (9/16 Pages) NEC – Direct Rambus DRAM RIMM Module 64M-BYTE 32M-WORD x 16-BIT

MC-4R64CEE6B, 4R64CEE6C
AC Electrical Specifications
Symbol
Parameter and Conditions
MIN. TYP. MAX. Unit
Z
Module Impedance
25.2
28
30.8 Ω
TPD
Average clock delay from finger to finger of all RSL clock nets
-845
1.25 ns
(CTM, CTMN,CFM, and CFMN)
-745
1.25
∆TPD
-653
Propagation delay variation of RSL signals with respect to TPD ^Note1,2
−21
1.25
+21 ps
∆TPD-CMOS Propagation delay variation of SCK and CMD signals with respect to
an average clock delay ^Note1
Vα/VIN
Attenuation Limit
−100
-845
+100 ps
12
%
-745
12
-653
8
VXF/VIN Forward crosstalk coefficient
-845
2
%
(300ps input rise time 20% - 80%)
-745
2
-653
2
VXB/VIN Backward crosstalk coefficient
-845
1.5
%
(300ps input rise time 20% - 80%)
-745
1.5
-653
1.5
RDC
DC Resistance Limit
-845
0.6
Ω
-745
0.6
-653
0.6
Notes 1. TPD or Average clock delay is defined as the average delay from finger to finger of all RSL clock nets (CTM,
CTMN, CFM, and CFMN).
2. If the RIMM module meets the following specification, then it is compliant to the specification.
If the RIMM module does not meet these specifications, then the specification can be adjusted by the
“Adjusted ∆TPD Specification” table.
Adjusted ∆TPD Specification
Symbol
Parameter and conditions
Adjusted MIN./MAX.
Absolute
Unit
MIN. MAX.
∆TPD Propagation delay variation of RSL signals with respect to TPD +/− [17+(18*N*∆Z0)] ^Note −30
+30
ps
Note N = Number of RDRAM devices installed on the RIMM module.
∆Z0 = delta Z0% = (MAX. Z0 − MIN. Z0) / (MIN. Z0)
(MAX. Z0 and MIN. Z0 are obtained from the loaded (high impedance) impedance coupons of all RSL layers
on the module.)
Preliminary Data Sheet M14537EJ1V1DS00
9